DPDK  19.08.0-rc0
rte_pci.h
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1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2010-2015 Intel Corporation.
3  * Copyright 2013-2014 6WIND S.A.
4  */
5 
6 #ifndef _RTE_PCI_H_
7 #define _RTE_PCI_H_
8 
15 #ifdef __cplusplus
16 extern "C" {
17 #endif
18 
19 #include <stdio.h>
20 #include <stdlib.h>
21 #include <limits.h>
22 #include <errno.h>
23 #include <sys/queue.h>
24 #include <stdint.h>
25 #include <inttypes.h>
26 
27 #include <rte_debug.h>
28 #include <rte_interrupts.h>
29 
31 #define PCI_PRI_FMT "%.4" PRIx16 ":%.2" PRIx8 ":%.2" PRIx8 ".%" PRIx8
32 #define PCI_PRI_STR_SIZE sizeof("XXXXXXXX:XX:XX.X")
33 
35 #define PCI_SHORT_PRI_FMT "%.2" PRIx8 ":%.2" PRIx8 ".%" PRIx8
36 
38 #define PCI_FMT_NVAL 4
39 
41 #define PCI_RESOURCE_FMT_NVAL 3
42 
44 #define PCI_MAX_RESOURCE 6
45 
50 struct rte_pci_id {
51  uint32_t class_id;
52  uint16_t vendor_id;
53  uint16_t device_id;
56 };
57 
61 struct rte_pci_addr {
62  uint32_t domain;
63  uint8_t bus;
64  uint8_t devid;
65  uint8_t function;
66 };
67 
69 #define PCI_ANY_ID (0xffff)
70 #define RTE_CLASS_ANY_ID (0xffffff)
71 
75 struct pci_map {
76  void *addr;
77  char *path;
78  uint64_t offset;
79  uint64_t size;
80  uint64_t phaddr;
81 };
82 
83 struct pci_msix_table {
84  int bar_index;
85  uint32_t offset;
86  uint32_t size;
87 };
88 
95  TAILQ_ENTRY(mapped_pci_resource) next;
96 
97  struct rte_pci_addr pci_addr;
98  char path[PATH_MAX];
99  int nb_maps;
100  struct pci_map maps[PCI_MAX_RESOURCE];
101  struct pci_msix_table msix_table;
102 };
103 
104 
106 TAILQ_HEAD(mapped_pci_res_list, mapped_pci_resource);
107 
122 int eal_parse_pci_BDF(const char *input, struct rte_pci_addr *dev_addr);
123 
137 int eal_parse_pci_DomBDF(const char *input, struct rte_pci_addr *dev_addr);
138 
151 void rte_pci_device_name(const struct rte_pci_addr *addr,
152  char *output, size_t size);
153 
167 int rte_eal_compare_pci_addr(const struct rte_pci_addr *addr,
168  const struct rte_pci_addr *addr2);
169 
182 int rte_pci_addr_cmp(const struct rte_pci_addr *addr,
183  const struct rte_pci_addr *addr2);
184 
185 
198 int rte_pci_addr_parse(const char *str, struct rte_pci_addr *addr);
199 
217 void *pci_map_resource(void *requested_addr, int fd, off_t offset,
218  size_t size, int additional_flags);
219 
228 void pci_unmap_resource(void *requested_addr, size_t size);
229 
230 #ifdef __cplusplus
231 }
232 #endif
233 
234 #endif /* _RTE_PCI_H_ */
int eal_parse_pci_BDF(const char *input, struct rte_pci_addr *dev_addr)
int rte_pci_addr_parse(const char *str, struct rte_pci_addr *addr)
int rte_eal_compare_pci_addr(const struct rte_pci_addr *addr, const struct rte_pci_addr *addr2)
uint16_t device_id
Definition: rte_pci.h:53
uint8_t bus
Definition: rte_pci.h:63
int eal_parse_pci_DomBDF(const char *input, struct rte_pci_addr *dev_addr)
uint32_t class_id
Definition: rte_pci.h:51
uint8_t devid
Definition: rte_pci.h:64
#define PCI_MAX_RESOURCE
Definition: rte_pci.h:44
uint16_t subsystem_device_id
Definition: rte_pci.h:55
uint32_t domain
Definition: rte_pci.h:62
void rte_pci_device_name(const struct rte_pci_addr *addr, char *output, size_t size)
uint16_t subsystem_vendor_id
Definition: rte_pci.h:54
TAILQ_HEAD(mapped_pci_res_list, mapped_pci_resource)
void pci_unmap_resource(void *requested_addr, size_t size)
int rte_pci_addr_cmp(const struct rte_pci_addr *addr, const struct rte_pci_addr *addr2)
uint16_t vendor_id
Definition: rte_pci.h:52
void * pci_map_resource(void *requested_addr, int fd, off_t offset, size_t size, int additional_flags)